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true accuracy, 16-bit 12 v/15 v, serial input voltage output dac ad5570 rev. 0 in fo rmation furn ished by an alog d e v i c e s is believed to be accurate and reliable. how e ver, n o resp on sibili ty is assume d b y a n alog de vices fo r its use, nor for an y i n fri n geme nt s of p a t e nt s or ot h e r ri ght s o f th ird parties th at may result fro m its use . specifications subjec t to chan g e witho u t n o tice. no licen s e is g r an te d by implicati o n or ot herwi s e u n der a n y p a t e nt or p a t e nt ri ghts of analog de v i ces. trademarks an d registered tra d ema r ks are the prop erty o f their respective ow ners. one technolog y way, p.o . box 9106, norwood, ma 02062-9106, u.s.a. t e l: 781. 329. 4 700 www.analog.com fax: 781. 326. 87 03 ? 2003 analog de vices, i n c. al l r i ght s r e ser v ed . features full 16-bit perf ormance 1 lsb max in l and dn l output voltage range up to 1 4 v on-board reference buffers, e l iminating the n eed for a negative ref e re nce controlled out p ut during po wer-on temperature r a nge of ?40 c t o +85c/? 40 c to +125 c settling time o f 10 s to 0. 003 % clear f u nction to 0 v async h ro no us update o f o u tp uts ( ldac pin) power-on reset serial data out p ut for dais y c h aining data readback facility applic ati o ns industrial auto mation automatic test equipment process control data acq u isitio n systems general-purpo s e instrumenta t ion func tio n a l block di agram v out v dd dgnd ad5570 refin refgnd ldac sdin clr sclk sync pd dac register shift register power-down control logic power-on reset sdo v ss r agnd agnds r r r 16-bit dac 03760-0-001 fi g u r e 1 . general description the ad5570 is a sin g le 16-b i t s e r i al in p u t, v o l t a g e o u t p u t d a c t h a t o p er a t es f r o m s u p p l y v o l t ag es o f 12 v u p t o 15 v . i n tegral lin e a r i t y (inl) a nd dif f er en tia l n o nlin e a r i ty (d nl) a r e acc u ra t e t o 1 l s b . dur i n g p o w e r - u p (w h e n the s u p p l y v o l t a g es are ch ang i ng ) , v ou t i s c l a m ped t o 0 v vi a a l o w i m peda n c e pa th . the ad5570 d a c co m e s c o m p let e wi th a s e t o f r e f e r e n c e b u f f ers. th e r e fer e n c e b u f f ers al lo w a sin g le , p o si ti v e r e fer e n c e t o be us e d . th e v o l t a g e on refi n is ga in e d u p and in v e r t ed i n t e rn all y t o gi v e th e posi ti v e a n d n e ga t i v e r e f e r e n c e f o r th e d a c co r e . h a v i n g t h e r e fer e n c e b u f f ers o n -chi p e l imina t es t h e n e e d f o r ext e r n al co m p on en ts suc h as in v e r t ers, p r ecisio n a m plif iers, an d r e sis t o r s, t h er eb y r e d u cin g t h e o v eral l s o l u t i o n size and cost. the ad5570 us es a v e rs a t ile 3 - wir e in t e r f ace t h a t is com p a t i b l e wi t h s p i?, qs p i ?, mi cr o w ire?, a n d ds p? in t e r f ace s t anda r d s. d a t a is p r es en t e d t o t h e p a r t in t h e fo r m a t o f a 16-b i t s e r i al w o r d . s e r i a l d a t a is a v ai lab l e o n t h e sd o p i n for da isy - chaini ng p u r p os es. d a t a r e ad b a ck al lo ws t h e us er t o r e ad t h e con t e n ts o f th e d a c r e gi s t er v i a th e s d o p i n . f e a t ur es o n t h e ad5570 in c l ude ld a c , w h i c h m a y b e u s e d t o u p da te t h e o u t p u t o f t h e d a c. the de v i ce als o has a p o w e r - do wn pin ( pd ), w h ich a l lo ws t h e d a c t o b e p u t i n to a lo w po w e r s t a t e , a n d a clr p i n tha t al lo ws th e ou t p u t t o be c l ea r e d to 0 v . the ad5570 is a v a i la b l e in a 16 -lead sso p p a cka g e. product highlights 1. 1 ls b maxim u m inl and dnl. 2. b u f f er ed v o l t a g e o u t p u t u p to 14 v . 3. o u t p u t con t rol l ed d u r i n g p o w e r - u p . 4 . o n - b o a rd re f e re nc e bu f f e r s . 5. w i de t e m p era t ur e ra n g e o f ? 40c t o +125c.
ad5570 rev. 0 | page 2 of 24 table of contents specifications ..................................................................................... 3 standalone timing characteristics ................................................ 4 daisy chaining and readback timing characteristics ............... 6 absolute maximum ratings ............................................................ 8 esd caution .................................................................................. 8 pin configuration and function descriptions ............................. 9 te r m i no l o g y .................................................................................... 10 typical performance characteristics ........................................... 11 general description ....................................................................... 16 dac architecture ....................................................................... 16 reference buffers ........................................................................ 16 serial interface ............................................................................ 16 transfer function ....................................................................... 17 clear ( clr ) ............................................................................. 17 power-down ( pd ) ..................................................................... 17 power-on reset .......................................................................... 17 serial data output (sdo) ......................................................... 17 applications information .............................................................. 19 typical operating circuit ......................................................... 19 layout guidelines ....................................................................... 20 opto-coupler interface ............................................................. 20 microprocessor interfacing ....................................................... 20 evaluation board ........................................................................ 22 outline dimensions ....................................................................... 24 ordering guide .......................................................................... 24 revision history revision 0: initial version
ad5570 rev. 0 | page 3 of 24 specifications v dd = +11.4 v to +16.5 v; v ss = ? 11.4 v to ? 16.5 v; v ref = 5 v; refgnd = gnd = 0 v; r l = 5 k? and c l = 200 pf to gnd; all specifications t min to t max , unless otherwise noted. table 1. a/w grade 1, 2 b/y grade 2 parameter min typ 3 max min typ 3 max unit test conditions/comments accuracy resolution * 16 bits monotonicity * 16 bits relative accuracy (inl) 0.6 0.4 1 lsb at 25c 0.6 2 ?1 0.4 +1.25 lsb differential nonlinearity (dnl) * * * ?1 0.3 +1 lsb negative full-scale error * * 0.9 7.5 mv full-scale error * * 1.8 6 mv bipolar zero error * * 0.9 7.5 mv gain error * * 1.8 7.5 mv gain temperature coefficient 4 * * 0.25 1.5 ppm fsr/c reference input reference input range 4 * * * 4 5 5 v with 11.4 v supplies * * * 4 5 7 v with 16.5 v supplies input current * 0.1 a output characteristics 4 output voltage range * * v ss + 1.4 v v dd ? 1.4 v v 11.4 v supplies * * v ss + 2.5 v v dd ? 2.5 v v 16.5 v supplies output voltage settling time * * 12 16 s at 16 bits to 0.5 lsb * * 10 13 s to 0.003% * * 6 7 s 512 lsb code change slew rate * 6.5 v/s measured from 10% to 90% digital-to-analog glitch impulse * 15 nv-s 12 v supplies; 1 lsb change around the major carry bandwidth * 20 khz short circuit current * 25 ma output noise voltage density * 85 nv/hz f = 1 khz; midscale loaded dac output impedance 4 * * 0.35 0.5 ? digital feedthrough * 0.5 nv-s warmup time 5 * 12 s logic inputs input current * 0.1 a v inh , input high voltage * 2 v v inl , input low voltage * 0.8 v c in , input capacitance 4 * 3 pf logic outputs v ol , output low voltage * 0.4 v i sink = 1 ma floating-state output capacitance * 8 pf
ad5570 rev. 0 | page 4 of 24 a/w grade 1, 2 b/y grade 2 parameter min typ 3 max min typ 3 max unit test conditions/comments power requirements v dd /v ss * * 11.4 16.5 v i dd * 4 5 ma v out unloaded i ss * 3.5 5 ma v out unloaded power-down current * 16 a v out unloaded power supply sensitivity 6 * 0.1 lsb/v 15 v supplies 10%; full scale loaded power dissipation * 100 mw v out unloaded 1 asterisk (*) = specifications same as b/y grade. 2 temperature range: a and b = ?40c to +85c; w and y = C40c to +125c. 3 typical specifications at 12 v/15 v, 25c. 4 guaranteed by design. 5 warmup time is required for the device to reach thermal equilibrium, thus ac hieving rated performance. 6 sensitivity of negative full-scale error and positive full-scale error to v dd , v ss variations.
ad5570 rev. 0 | page 5 of 2 4 standalone timing characteristics v dd = +12 v 5% , v ss = ?12 v 5% o r v dd = +15 v 10%, v ss = ?15 v 10 % ; v ref = 5 v ; refgnd = gnd = 0 v ; r l = 5 k?; a nd c l = 200 pf t o gnd; al l sp e c if ica t ion s t min to t max , u n l e s s o t h e r w i s e n o t e d . table 2. parameter limit at t min , t ma x unit description f max 10 mhz max sclk frequency t 1 100 ns min sclk cycle time t 2 35 ns min sclk high time t 3 35 ns min sclk low time t 4 1 0 n s m i n sync to sclk falling edge setup time t 5 35 ns min data setup time t 6 0 ns min data hold time t 7 4 5 n s m i n sclk falling edge to sync rising edge t 8 4 5 n s m i n minimum sync high time t 9 0 n s m i n sync rising edge to ldac falling ed ge t 10 5 0 n s m i n ldac pulse wid t h t 11 0 n s m i n ldac falling edge to sync fal l i ng edge (no update) t 12 0 n s m i n ldac rising edge to sync r i s i ng edge (no update) t 13 2 0 n s m i n clr pulse wid t h al l pa ra m e t e rs gua r a n t eed by de si gn a n d ch a r a c t e ri za t i on. n o t pro d uct i on t e st ed. al l i n put si gn a l s a r e m e a s ur ed wi t h t r = t f = 5 n s (10% t o 90 % of v dd ) a n d t i m e d fr om a vo lt a g e lev e l of ( v il +v ih )/2. db15 db0 sclk sync sdin ldac 1 clr ldac 2 notes 1. asynchronous ldac update mode. update on falling edge of ldac. 2. synchronous ldac update mode. update on rising edge of sync. t 3 t 2 t 5 t 6 t 7 t 9 t 1 t 4 t 8 t 12 t 11 t 10 t 13 03760-0-002 f i g u re 2. s e r i a l in te r f ac e ti m i ng d i ag r a m
ad5570 rev. 0 | page 6 of 2 4 daisy-chaining and readback timing characteristics v dd = +12 v 5 % , v ss = ? 12 v 5% o r v dd = +15 v 10%, v ss = ? 15 v 10%; v ref = 5 v ; refgnd = gnd = 0 v ; r l = 5 k?, a nd c l = 200 pf t o gnd; al l sp e c if ica t ion s t min to t max , u n l e s s o t h e r w i s e n o t e d . table 3. parameter limit at t min , t ma x unit description f max 2 mhz max sclk frequency t 1 500 ns min sclk cycle time t 2 200 ns min sclk high time t 3 200 ns min sclk low time t 4 1 0 n s m i n sync to sclk falling edge setup time t 5 35 ns min data setup time t 6 0 ns min data hold time t 7 4 5 n s m i n sclk falling edge to sync rising edge t 8 4 5 n s m i n minimum sync high time t 9 0 n s m i n sync rising edge to ldac falling ed ge t 10 5 0 n s m i n ldac pulse wid t h t 14 1 2 0 0 n s m a x data delay on sdo al l pa ra m e t e rs gua r a n t eed by de si gn a n d ch a r a c t e ri za t i on. n o t pro d uct i on t e st ed. al l i n put si gn a l s a r e m e a s ur ed wi t h t r = t f = 5 n s (10% t o 90 % of v dd ) a n d t i m e d fr om a vo lt a g e lev e l of ( v il +v ih )/2. sdo; r p u llu p = 5 k?, c l = 15 pf. 1 with c l = 0 pf, t 15 = 100 ns. sclk sync sdin db15 (n) db15 (n) db0 (n) db0 (n) db15 (n+1) db15 (n+1) db0 (n+1) ldac 1 sdo ldac 2 notes 1. asynchronous ldac update mode 2. synchronous ldac update mode t 1 t 8 t 10 t 2 t 3 t 4 t 6 t 5 t 9 t 7 t 14 03760-0-003 f i gure 3. d a isy- chain i ng t i ming d i ag r a m
ad5570 rev. 0 | page 7 of 2 4 sclk sync sdin sdo ldac db15 (n) db0 (n) db0 (n) db14 (n) db15 (n) db15 (n+1) db0 (n+1) t 2 t 3 t 6 t 5 t 7 t 9 t 1 t 10 t 14 t 8 t 4 03760-0-004 f i g u re 4. r e adba ck ti mi ng d i ag r a m
ad5570 rev. 0 | page 8 of 2 4 absolute maximum ratings t a = 2 5 c , u n l e ss ot he r w i s e not e d. table 4. p a r a m e t e r r a t i n g v dd to agnd, a g nds, dgnd ?0.3 v, +17 v v ss to agnd, a g nds, dgnd +0.3 v, ?17 v agnd, agn d s t o dgnd ?0.3 v to +0.3 v refgnd to agn d , adnds v ss ? 0.3 v to v dd + 0.3 v refin to agnd, agnds v ss ? 0.3 v to v dd + 0.3 v refin to refgn d ?0.3 v to +17 v digital inputs to dgnd ?0.3 v to v dd + 0.3 v v ou t to agnd, a g nds ?0.3 v to v dd + 0.3 v sdo to dgnd ?0.3 v to +6.5 v operating tem p erature range: ?40c to +125c w, y gra d es ?40c to +125c a, b grades ?40c to +85c storage temperature range ?65c to +150c maximum junction temperature (t j max) 150c 16-lead ssop p a ckage power dissi pati on ( t j max C t a )/ ja ja thermal impedance 139c/w lead temperature (soldering 10 s) 300c ir reflow, peak temperature 230c s t r e s s es a b o v e t h os e lis t e d u n de r a b s o l u t e m a xi m u m r a t i n g s ma y c a us e p e r m a n en t dama ge t o t h e de vice . this is a s t r e s s ra t i n g onl y a nd f u n c t i o n al op era t io n o f t h e de v i ce a t t h es e o r a n y o t h e r con d i t io n s ab o v e t h o s e lis t e d i n t h e op era t io nal s e c t io n s o f t h is sp e c if ic a t ion is n o t i m plie d . e x p o sur e t o ab s o lute m a x i m u m r a t i ng c o nd it i o ns for e x te nd e d p e r i o d s m a y af fe c t d e v i c e rel i a b i l it y . esd caution esd (electrostatic discharge) sensitive device. ele c tros tatic charg e s as high as 4000 v readily accumulate on the human body and test eq uipment and can discharge wi thout detection. although this product features proprietary esd protection circu i try, permanent dama ge may occur on devices subjected to high energy electrostatic discharges. theref ore, prop er esd precautions a r e recommended to avoid perform a nce degradation or l o ss of functiona l ity.
ad5570 rev. 0 | page 9 of 2 4 pin conf iguration and fu nction descriptions v ss 1 v dd 2 clr 3 ldac 4 sync 5 sclk 6 sdin 7 sdo 8 refgnd refin refgnd v out agnds 16 15 14 13 12 agnd pd dgnd 11 10 9 ad5570 top view (not to scale) 03760-0-005 f i g u re 5. 16-l e ad s s op pin conf ig u r at ion (r s-16) ta ble 5. pi n f u nct i on d e s c ri pt i o ns pin no. mnemonic description 1 v ss negative analog supply voltage. ?12 v 5% to ?15 v 10% for specified perfor mance. 2 v dd positive analog supply voltage. 12 v 5% to 15 v 10% for specified performa nce. 3 clr level sensitive, active low input. a falling edge of clr resets v ou t to agnd. the contents of the registers are untouched. 4 ldac active low control input. transfers the contents of the input reg i ster to the dac register. ldac may be tied permane n tly lo w, enab ling the outputs to be u p dated on the rising edge of sync . 5 sync active low control input. this is the frame synch r onization signa l for the data. when sync goes lo w, it powers on the sclk and sdin buffers an d enable s the input shift register. data is tr ansfe rred in on the falling ed ges of the follo wing 16 clock s . 6 s c l k serial clock input. data is clocked into the input register on the falling edge of the seria l cloc k in put. data can be transferred at rates of up to 8 mhz. 7 s d i n serial data inpu t. this device has a 16-bit register. data is cloc k e d into the register on the fallin g edge of the serial c l oc k inpu t. 8 s d o serial data output. can be us ed for daisy chainin g a number of devices together or for reading back the data in the shift register for diagnostic purposes. this i s an open- d r ai n o utput; it should be pulled to logi c high with an external pull-up resistor of ~5 k ? . 9 dgnd digital ground. ground reference for all digital circuitry. 10 pd active low control input. allow s the dac to be put into a powe r-down state. 11 agnd analog ground. ground reference for all analog circuitry. 12 agnds analog ground sense. th is is normally tied to agnd. 13 v ou t analog output voltage. 14 refgnd t h is pin sh ould be tied to 0 v. 15 refin voltage reference input. this is inte rnally buffer e d before being applied to the dac. for bipolar 10 v output range, refin is 5 v. 16 refgnd t h is pin sh ould be tied to 0 v.
ad5570 rev. 0 | page 10 of 24 terminology relative accuracy or integral nonlinearity (inl) relative accuracy or integral nonlinearity is a measure of the maximum deviation, in lsbs, from a straight line passing through the endpoints of the dac transfer function. monotonicity a dac is monotonic, if the output either increases or remains constant for increasing digital inputs. the ad5570 is monotonic over its full operating temperature range. differential nonlinearity (dnl) differential nonlinearity is the difference between the measured change and the ideal 1 lsb change between any two adjacent codes. a specified differential nonlinearity of 1 lsb maximum ensures monotonicity. gain error gain error is the difference between the actual and ideal analog output range, expressed as a percent of the full-scale range. it is the deviation in slope of the dac transfer characteristic from the ideal. gain error temperature coefficient gain error temperature coefficient is a measure of the change in gain error with changes in temperature. it is expressed in ppm/c. negative full-scale error / zero scale error negative full-scale error is the error in the dac output voltage when all 0s are loaded into the dac latch. ideally, the output voltage, with all 0s in the dac latch, should be ?2 v ref . full-scale error full-scale error is the error in the dac output voltage when all 1s are loaded to the dac latch. ideally the output voltage, with all 1s loaded into the dac latch, should be 2 v ref ? 1 lsb. bipolar zero error bipolar zero error is the deviation of the analog input from the ideal half-scale output of 0.0000 v when the inputs are loaded with 0x8000. output voltage settling time output voltage settling time is the amount of time it takes for the output to settle to a specified level for a full-scale input change. slew rate the slew rate of a device is a limitation in the rate of change of output voltage. the output slewing speed of a voltage-output d/a converter is usually limited by the slew rate of the amplifier used at its output. slew rate is measured from 10% to 90% of the output signal and is given in v/s. digital-to-analog glitch impulse digital-to-analog glitch impulse is the amount of charge in- jected into the analog output when the input codes in the dac register change state. it is specified as the area of the glitch in nv-s and is measured when the digital input code changes by 1 lsb at the major carry transition, that is, from code 0x7fff to 0x8000. bandwidth the reference amplifiers within the dac have a finite band- width to optimize noise performance. to measure it, a sine wave is applied to the reference input (refin), with full-scale code loaded to the dac. the bandwidth is the frequency at which the output amplitude falls to 3 db below the input. digital feedthrough digital feedthrough is a measure of the impulse injected into the analog output of the dac from the digital inputs of the dac, but is measured when the dac output is not updated. sync is held high, while the clk and sdin signals are toggled. it is specified in nv-s and is measured with a full-scale code change on the data bus, that is, from all 0s to all 1s and vice versa. power supply sensitivity power supply sensitivity indicates how the output of the dac is affected by changes in the power supply voltage.
ad5570 rev. 0 | page 11 of 24 typical perf orm ance cha r acte ristics code inl ( l sb) 0 ? 1.0 ? 0.8 ? 0.6 ? 0.4 ? 0.2 0 0.2 1.0 0.6 0.4 0.8 50k 40k 30k 20k 10k 60k 03760-0-006 t a = 25 c v dd /v ss = 15v refin = 5v f i gure 6 . integr a l no nli n ea ri t y vs . c o d e , v dd /v ss = 1 5 v code dnl (ls b ) 0 ? 1.0 ? 0.8 ? 0.6 ? 0.4 ? 0.2 0 0.2 1.0 0.6 0.4 0.8 50k 40k 30k 20k 10k 60k 03760-0-007 t a = 25 c v dd /v ss = 15v refin = 5v f i gur e 7 . d i ffe r e ntia l no nl inea ri t y vs . c o de , v dd /v ss = 1 5 v code inl ( l sb) 0 ? 1.0 ? 0.8 ? 0.6 ? 0.4 ? 0.2 0 0.2 1.0 0.6 0.4 0.8 50k 40k 30k 20k 10k 60k 03760-0-008 t a = 25 c v dd /v ss = 12v refin = 5v f i gure 8 . integr a l no nli n ea ri t y vs . c o d e , v dd /v ss = 1 2 v code dnl (ls b ) 0 ? 1.0 ? 0.8 ? 0.6 ? 0.4 ? 0.2 0 0.2 1.0 0.6 0.4 0.8 50k 40k 30k 20k 10k 60k 03760-0-009 t a = 25 c v dd /v ss = 12v refin = 5v f i gur e 9 . d i ffe r e ntia l no nl inea ri t y vs . c o de , v dd /v ss = 1 2 v temperature ( c) inl (lsb) ?40 ?1.0 ?0.8 ?0.6 ?0.4 ?0.2 0 0.2 1.0 0.8 0.4 0.6 100 80 60 40 20 0 ?20 120 03760-0-018 v dd /v ss = 15v refin = 5v f i gure 10. integ r a l non lin ea rit y v s . t e mpe r atu r e , 1 5 v s u p p l i es temperature (c) dnl (ls b ) ?4 0 ?1.0 ?0.8 ?0.6 ?0.4 ?0.2 0 0.2 1.0 0.8 0.4 0.6 100 80 60 40 20 0 ?20 120 03760-0-019 v dd /v ss = 15v refin = 5v f i g u re 11. d i f f e r e nt ia l n o nl in ea rit y v s . t e m p er at ure , 15 v sup p l i es
ad5570 rev. 0 | page 12 of 24 temperature (c) in l ( l sb ) ?4 0 ? 1.0 ? 0.8 ? 0.6 ? 0.4 ? 0.2 0 0.2 1.0 0.8 0.4 0.6 100 80 60 40 20 0 ?20 120 03760-0-020 v dd /v ss = 12v refin = 5v f i gure 12. integ r a l non lin ea rit y v s . t e mpe r atu r e , 1 2 v sup p l i es temperature (c) dnl (ls b ) ?4 0 ? 1.0 ? 0.8 ? 0.6 ? 0.4 ? 0.2 0 0.2 1.0 0.8 0.4 0.6 100 80 60 40 20 0 ?20 120 03760-0-021 v dd /v ss = 12v refin = 5v f i g u re 13. d i f f e r e nt ia l n o nl in ea rit y v s . t e m p er at ure , 12 v sup p l i es supply voltage (v) inl ( l sb) 11.4 15.0 14.0 13.0 12.0 16.0 16.5 03760-0-023 ? 1.0 ? 0.6 ? 0.4 ? 0.2 ? 0.8 0.2 0.4 0 1.0 0.6 0.8 t a = 25 c refin = 5v f i g u re 14. integ r a l non lin ea rit y v s . su p p ly v o lt ag e supply voltage (v) dnl (ls b ) 11.4 15.0 14.0 13.0 12.0 16.0 16.5 03760-0-024 ? 1.0 ? 0.6 ? 0.4 ? 0.2 ? 0.8 0.2 0.4 0 1.0 0.6 0.8 t a = 25 c refin = 5v f i g u re 15. d i f f e r e nt ia l n o nl in ea rit y v s . sup p ly v o lt ag e reference voltage (v) inl e rror (ls b ) 2.0 ? 1.0 ? 0.5 0 0.5 1.0 2.0 1.5 4.5 4.0 3.5 3.0 2.5 5.0 5.5 03760-0-026 v dd /v ss = 12v t a = 25 c f i gure 16. integ r a l non lin ea rit y e rror v s . r e fer e nc e v o lta g e , 1 2 v su p p l i es reference voltage (v) dnl e rror (ls b ) 2.0 ? 0.5 ? 0.3 ? 0.2 ? 0.1 ? 0.4 0 0.1 0.2 0.3 0.5 0.4 4.5 4.0 3.5 3.0 2.5 5.0 5.5 03760-0-027 v dd /v ss = 12v t a = 25 c f i gure 17. d i ffe r e nt ia l n o nl in ea rit y e r ror v s . r e fe r e nce v o l t age , 1 2 v su p p l i es
ad5570 rev. 0 | page 13 of 24 reference voltage (v) tu e er r o r ( l sb ) 2.0 ? 5.0 ? 2.5 0 2.5 5.0 10.0 7.5 4.5 4.0 3.5 3.0 2.5 5.0 5.5 03760-0-028 v dd /v ss = 15v or 12v t a = 25 c f i gure 18. tu e e rro r v s . r e fer e nc e v o lt age reference voltage (v) inl error (lsb) 2.0 2.5 ?2.0 ?1.5 ?1.0 ?0.5 0 0.5 1.0 1.5 2.0 3.5 3.0 5.0 5.5 6.0 4.5 4.0 6.5 03760-0-048 v dd /v ss = 15v t a = 25 c f i gure 19. integ r a l non lin ea rit y e rror v s . r e fer e nc e v o lta g e , 1 5 v s u p p l i es reference voltage (v) inl e rror (ls b ) 2.0 2.5 ?1.0 ?0.8 ?0.6 ?0.4 ?0.2 0 0.2 0.4 0.6 0.8 1.0 3.5 3.0 5.0 5.5 6.0 4.5 4.0 6.5 03760-0-049 v dd /v ss = 15v t a = 25 c f i gure 20. d i ffe r e nt ia l n o nl in ea rit y e r ror v s . r e fe r e nce v o l t age , 1 5 v s u p p l i es v dd /v ss (v) |i ss | curre nt (ma) 11.4 2.0 2.5 3.0 3.5 4.0 5.0 4.5 14.4 13.4 12.4 15.4 16.4 03760-0-029 |i dd | t a = 25 c refin = 5v f i g u re 21. i dd /i ss vs . v dd /v ss i dd /i ss (v) p o we r-down curre n t ( a) 11.4 0 5 10 15 25 20 14.4 13.4 12.4 15.4 16.4 03760-0-030 |i ss in power-down | |i dd in power-down | t a = 25 c refin = 5v f i g u re 22. i dd /i ss i n p o we r - d o wn v s . sup p ly v o lt ag e temperature (c) offset er r o r ( l sb ) ?4 0 ?1 0 ?9 ?8 ?7 ?6 ?5 ?4 0 ?1 ?3 ?2 100 80 60 40 20 0 ?20 120 03760-0-031 v dd /v ss = 12v or 15v refin = 5v f i gure 23. o ffs et e r r o r v s . t e mpe r atu r e
ad5570 rev. 0 | page 14 of 24 temperature (c) bip o lar ze ro e rror (ls b ) ?4 0 ?1 0 ?9 ?8 ?7 ?6 ?5 ?4 0 ?1 ?3 ?2 100 80 60 40 20 0 ?20 120 03760-0-032 v dd /v ss = 12v v dd /v ss = 15v refin = 5v f i gure 24. bipol a r zero e rror v s . t e mpe r ature temperature (c) gain e rror (ls b ) ?4 0 ?1 0 ?8 ?6 ?4 ?2 0 2 10 0 4 6 100 80 60 40 20 0 ?20 120 03760-0-034 v dd /v ss = 12v v dd /v ss = 15v refin = 5v f i gure 25. g a in e r ror v s . t e mper atur e v logic (v) i dd (ma) 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 3.75 3.80 3.85 3.90 3.95 4.00 4.05 4.10 4.15 5.0 03760-0-035 t a = 25c refin = 5v 15v supplies decreasing increasing 12v supplies increasing decreasing f i gure 26. sup p l y current v s . l o gic i n p u t current fo r scl k , sy nc , sdin , and ld a c i n cr ea si n g a n d dec r e a si n g ?10.0 ?4.0 ?6.0 ?8.0 4.0 2.0 0 ?2.0 11.0 10.0 8.0 6.0 1 s/div v dd = +15v v ss = ? 15v refin = 5v t a = 25c 03760-0-046 f i gure 2 7 . s e ttli n g t i m e capacitance (nf) time ( s) 01 2 3 4 5 6 7 8 9 0 5 10 15 20 25 30 35 40 9.4 03760-0-037 t a = 25c refin = 5v v dd /v ss = 12v v dd /v ss = 15v f i g u re 28. 14- bit s e t t ling ti me v s . l o ad capa cit a nc e sink current (ma) source current (ma) output voltage (v) ? 1 0 ? 8 ? 6 ? 4 ? 2 024 68 9.9952 9.9955 9.9958 9.9961 9.9964 9.9967 9.9970 9.9973 9.9976 9.9979 9.9982 9.9985 9.9988 9.9991 9.9994 9.9997 10.0000 10 03760-0-038 15v supplies 12v supplies t a = 25c refin = 5v f i g u re 29. s o urc e a n d sink ca pab i lit y of o u t p ut a m pl if i e r wi th f u ll s c al e l o ade d
ad5570 rev. 0 | page 15 of 24 output voltage (v) ? 1 0 ? 8 ? 6 ? 4 ? 2 024 68 ? 10.0000 ?9.9997 ?9.9994 ?9.9991 ?9.9988 ?9.9985 ?9.9982 ?9.9979 ?9.9976 ?9.9973 10 03760-0-039 12v supplies 15v supplies sink current (ma) source current (ma) t a = 25 c refin = 5v f i g u re 30. s o urc e a n d sink ca pab i lit y of o u t p ut a m pl if i e r wit h zero s c al e l o aded 1 s/div v out (v ) ? 0.10 ? 0.09 ? 0.08 ? 0.07 ? 0.06 ? 0.05 v dd = +15v v ss = ? 15v refin = 5v t a = 25c 7 fff 8000h 03760-0-040 f i g u re 31. m a j o r co de t r ans i t i o n gl it ch e n er g y , 15 v sup p lies 1 s (div) volta g e ( v ) ?0.072 ?0.067 ?0.062 ?0.057 ?0.052 ?0.047 ?0.042 ?0.037 ?0.032 ?0.027 ?0.022 v dd = +12v v ss = ? 12v refin = 5v t a = 25c 8000 7fffh 03760-0-051 f i g u re 32. m a j o r co de t r ans i t i o n gl it ch e n er g y , 12 v sup p lies ch1 20 v/div 20 s/pt m 1.0 ? ms 500ks/s a ch1 0.0v 03760-0-047 v dd = +15v v ss = ? 15v midscale loaded 20 v/div v refin = 0v fi g u r e 3 3 . pe a k - t o - pe a k n o is e (100 kh z bandwidth) v dd = +15v v ss = ? 15v refin = 5v t a = 25c ramp time = 100 s v dd /v ss = 10v/div v out = 10mv/div 100 s/div v out v ss v dd 03760-0-042 f i g u re 34. v ou t vs . v dd /v ss on p o we r - u p
ad5570 rev. 0 | page 16 of 24 gene ral description the ad5570 is a sin g le 16-b i t, s e r i al in p u t, v o l t a g e o u t p u t d a c. i t o p era t es f r o m s u p p l y v o l t a g es o f 11.4 v t o 16.5 v , a nd has a b u f f er ed v o l t a g e o u t p u t o f u p t o 13.6 v . da t a is wr i t t e n t o the ad5570 in a 16 -b i t w o r d f o r m a t , via a 3-wir e s e r i al in ter f ace . the d e v i ce a l s o o f fers a n s d o pin, w h ich is a v a i la b l e fo r da i s y cha i ning o r r e ad b a ck. the ad5570 inco r p o r a t es a p o w e r - o n r e s e t cir c ui t, which en s u r e s tha t t h e d a c o u t p u t p o w e rs u p t o 0 v . the device als o has a p o w e r - do w n p i n, w h ich r e d u ces t h e ty p i c a l c u r r en t co n s um p t io n t o 16 a. dac architecture the d a c a r c h i t ec t u r e o f th e ad5570 co n s is ts o f a 16-b i t c u r r en t-m o de s e g m e n te d r - 2r d a c. th e si m p l i f i e d cir c ui t di a g r a m fo r t h e d a c s e c t ion is sh own i n f i gur e 35. the fo ur ms bs o f t h e 16- b i t d a t a w o r d a r e d e co de d to dr i v e 15 sw i t ch es, e1 t o e15. e a ch o f t h es e sw i t ch es c o nn e c ts on e o f t h e 15 ma t c h e d r e sis t o r s t o ei t h er a g nd o r io u t . th e r e main- in g 12 b i ts o f t h e da t a w o r d dr iv e sw i t ch es s0 to s11 o f t h e 12-b i t r - 2r ladder n e tw o r k. 2r e15 v ref 2r e14 e1 2r s11 rr r 2r s10 2r 12 bit r-2r ladder v out 2r s0 2r agnd r/8 4 msbs decoded into 15 equal segments 03760- 0- 010 f i gure 35. d a c l a d d er stru c t ur e reference buffers the ad5570 o p era t es wi t h an ext e r n al r e f e r e n c e . the r e f e r e n c e in p u t (refin) has a n in p u t ran g e o f u p t o 7 v . this i n p u t v o l t a g e is t h e n us e d t o p r o v ide a b u f f er e d p o si t i v e an d nega t i v e re f e re nc e f o r t h e d a c c o re. t h e p o s i t i ve re f e re nc e i s g i ve n by refin ref v 2 v = + w h i l e t h e ne g a t i ve re f e re nc e to t h e d a c c o re i s g i ve n by refin ref v 2 v = ? th e s e p o si t i v e and nega t i v e r e fe r e n c e v o l t a g es def i n e t h e d a c output r a nge. serial interface the ad5570 is co n t r o l l ed o v er a v e rs a t ile 3 - wir e s e r i al in t e r f ac e t h at o p e r at e s at c l o c k r a t e s u p t o 1 0 m h z a n d i s c o mp at i b l e w i t h s p i, qs p i , mi c r o w ire, an d ds p in t e r f ace st a nda r d s. input shift r e gister the in p u t shif t r e g i s t er is 16 b i ts wide . da ta is l o aded in t o t h e de vice as a 16- b i t w o r d u n der t h e con t r o l o f a s e r i a l clo c k i n p u t , sclk. t h e t i mi n g d i a g ram fo r t h is o p era t ion is sh o w n i n fi g u r e 2 . u p o n p o w e r - u p , t h e i n p u t s h if t r e g i s t er an d d a c r e g i s t er a r e lo aded wi th mids cale (0x8000). the d a c c o din g is s t ra ig h t bi n a r y ; a l l 0 s pro d u c e a n output of ? 2 v ref ; a l l 1 s p r o d u c e a n output of + 2 v ref ? 1 ls b . the sy n c in p u t is a le vel -t r i g g er e d i n p u t t h a t ac t s as a f r a m e syn c hr o n iza t ion sig n al a nd c h i p ena b le . sy n c m u s t f r a m e t h e s e r i al w o r d being lo aded in t o the de vic e . da t a c a n be tra n s- f e r r ed in t o the de vice onl y whi l e sy n c is lo w . t o s t ar t th e s e r i al da ta tra n sf e r , sy n c s h o u l d b e ta k e n lo w , o b s e r v i n g th e mini m u m sy n c t o sclk fal l ing edge s e t u p t i m e , t 4 . a f t e r sy n c g o es lo w , s e r i al da ta on s d i n is s h if t e d in t o t h e de vice s in p u t shif t r e g i st er o n t h e fa l l ing e d ges o f scl k . sy n c ma y b e tak e n h i gh a f t e r th e fallin g ed g e o f th e 16th scl k p u lse , obs e r v in g t h e mini m u m s c l k fa l l in g e d ge to sy n c ri s i n g ed g e ti m e , t 7 . af ter t h e e nd o f t h e s e r i a l da t a t r a n sfer , da t a is a u to ma t i ca l l y t r a n sfer r e d f r o m t h e i n p u t shif t r e g i s t er t o t h e in p u t r e g i s t er o f th e d a c . w h e n da ta ha s been tra n sf e r r e d i n t o th e i n p u t r e gi s t e r o f th e da c , t h e da c r e g i s t e r a n d da c o u t p u t c a n b e u p d a t e d b y takin g l d a c lo w while s y n c is hig h . load dac i n p u t ( ldac ) w h e n da ta ha s been tra n sf e r r e d i n t o th e i n p u t r e gi s t e r o f th e d a c, t h er e a r e t w o wa ys in w h i c h t h e d a c r e g i s t er an d d a c output c a n b e up d a t e d. d e p e nd i n g on t h e st atu s of b o t h sy n c a nd ld a c , one of t w o up d a t e mo d e s i s s e l e c t e d . sy n c h r o n o u s ld a c : in t h i s m o d e , ld a c i s lo w wh ile da t a is be in g c l ock e d in t o th e in p u t shi f t r e gi s t e r . th e d a c o u t p u t i s up d a t e d w h e n sy n c is t a k e n h i g h . t h e u p da te h e r e o c c u rs o n th e ri si n g ed ge o f sy n c .
ad5570 rev. 0 | page 17 of 24 asy n ch r o n o u s ld a c : in t h i s m o d e , ld a c is hig h w h i l e d a t a is be in g c l ock e d in . th e d a c o u t p u t i s u p da t e d b y taki n g ld a c l o w an y t i me af t e r sy n c has b e e n t a k e n hig h . t h e up d a t e n o w o c c u r s on t h e f a l l i n g e d ge of ld a c . f i gur e 36 sh o w s a sim p lif i e d b l o c k d i a g ram o f t h e i n p u t lo ading cir c ui tr y . v out dac register input shift register output i/v amplifier ld a c sdo sdin 16-bit dac v refin sync 03760-0-012 f i gure 3 6 . sim p li fied s e ria l i n t e r f a ce s h o w i n g input l o a d i n g cir c u i tr y trans f er functi on t a b l e 6 sh o w s t h e i d e a l i n p u t c o de t o o u t p u t vol t a g e r e la t i on shi p f o r th e ad5570. table 6. binar y code tabl e digital input a n alog ou tpu t msb l s b v out 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +2 v ref (32,76 7/32,768) 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 +2 v ref (1/32,768) 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 v 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ?2 v ref (1/32,768) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ?2 v ref the o u t p u t v o l t a g e exp r es sio n i s g i v e n b y ] 65536 / [ 4 2 d v v v refin refin out + ? = w h er e: d is th e decimal eq ui valen t o f th e co de lo ade d t o th e d a c. v refin is t h e r e fer e n c e v o l t a g e a v a i la b l e a t t h e re fin p i n. clear (clr ) clr i s a n a c ti v e lo w d i gi tal i n p u t tha t allo w s th e o u t p u t t o be cle a r e d t o 0 v . w h en t h e clr s i gn al i s b r o u gh t bac k h i g h , th e o u t p u t s t ay s at 0 v u n t i l ld a c i s brou g h t l o w . t h e re l a t i on sh ip bet w een ld a c and clr is ex pla i ne d f u r t her in t a b l e 7. tab l e 7. relation ship s amon g pd , clr , and ldac pd clr ldac comments 0 x x pd has priority over ldac and clr . the output remains at 0 v through a n internal 20 k? resistor. it is still p o ssi ble t o ad d r ess both the input register and dac register when the ad5570 is in power-d own. 1 0 0 data is written to the input register and dac register. clr has higher pri o rit y over ldac ; therefore, the output is at 0 v. 1 0 1 data is written to the input register only. the output is at 0 v and remains at 0 v, when clr is taken b a ck high. 1 1 0 data is written to the input register and the dac register. the output is driven to the dac level. 1 1 1 data is written to the input register only. the output of the dac register is unchanged. power-down (pd ) the p o w e r - down p i n al lo ws th e us er t o p l ace the ad5570 in t o a p o w e r - do w n mo de . w h en in t h is m o d e , p o w e r co n s um p t io n is a t a minim u m; th e de vice co n s u m es o n l y 16 a typ i cal l y . power-on reset the ad5570 con t a i n s a p o w e r - o n r e s e t cir c ui t tha t con t r o ls the o u t p ut d u r i n g p o w e r - u p a nd p o w e r - do w n . this is us ef u l in a p plic a t ion s w h er e t h e k n own st a t e o f t h e o u t p u t o f t h e d a c d u ri n g po w e r - u p i s i m po r t a n t . o n po w e r - u p a n d po w e r - d o w n , t h e output of t h e d a c , v ou t , i s h e l d a t a g n d .
ad5570 rev. 0 | page 18 of 24 68hc11* miso sync sdin sclk mosi sck pc7 pc6 ldac sdo sync sclk ldac sdo sync sclk ldac sdo sdin sdin *additional pins omitted for clarity ad5570* ad5570* ad5570* v logic r r r 03760-0-013 serial d a ta o u tp ut (sd o ) the s e r i al da t a o u t p ut (s d o ) is t h e i n t e r n al shi f t r e g i s t er s o u t p u t . f o r th e ad5570, s d o is a n in t e r n al p u l l -do w n onl y ; a n e x te r n a l pu l l - u p re s i stor of ~ 5 k ? to e x te r n a l l o g i c h i g h i s r e q u ir e d . s d o p u l l -do w n is dis a b l e d w h en t h e de vice is in po w e r - d o wn , th u s sa v i n g cu rr e n t . the a v a i lab i l i ty o f s d o al lo ws a n y n u m b er o f ad5570s t o b e d a i s y- c h a i n e d t o g e th e r . i t also allo w s f o r th e co n t en t s o f th e d a c re g i ste r , or an y n u mb e r of d a c s d a i s y - ch a i ne d to ge t h e r , t o be r e ad back f o r dia g n o s t ic p u r p os es. daisy ch ainin g this m o d e o f o p era t ion is desi g n e d fo r m u l t i- d a c sy st e m s, wher e s e veral ad5570s ma y be co nnec t e d in cas c ade as sh o w n in f i gur e 37. this is do ne b y co nn ec t i n g t h e con t r o l in p u ts in p a r a l l el a nd t h e n d a isy cha i n i ng t h e s d i n and s d o i/ os o f eac h de vice . an ext e r n al p u l l -u p r e sis t o r o f ~5 k? o n s d o is r e q u ir e d w h e n usin g t h e p a r t i n d a isy - chain mo de . as b e f o r e , w h e n sy n c g o es lo w , s e r i al da ta on s d i n is s h if t e d in t o t h e i n p u t shif t r e g i s t er on t h e fal l i n g e d ge o f sclk. i f m o re th a n 16 c l oc k p u lse s a r e a p p l i e d , th e da t a ri p p le s o u t o f th e sh ift r e sister a nd a p p e a r s o n t h e s d o line. by co nne c t in g t h is li n e to th e s d i n in p u t o n the n e xt ad5570 in t h e c h a i n, a m u l t i-d a c i n te r f a c e m a y b e c o nst r u c te d. f i g u re 37. d a is y ch ain i ng u s ing t h e a d 55 7 0 on e da t a t r a n sfer c y cle o f 16 sclk p u ls es is r e q u ir e d fo r e a ch d a c i n t h e sys t em. th er efo r e , t h e t o t a l n u m b er o f clo c k c y cles m u s t e q ual 16 n, w h er e n is t h e t o t a l n u m b er o f de vi ces in t h e cha i n. the f i rs t da t a t r an sfer c y cle wr i t t e n in t o t h e chain a p p e a r s a t t h e las t d a c in t h e s y s t em on t h e f i nal da t a t r a n sfer cy c l e . re ad bac k the ad5570 al lo ws th e da ta con t a i ned in t h e d a c r e g i s t er t o b e r e a d b a ck, if r e q u ir e d . a s wi t h d a isy cha i n i ng, a n ext e r n a l pu l l - u p re s i stor of ~ 5 k ? on sd o i s re qu i r e d . t h e d a t a i n t h e d a c r e g i s t er is a v a i la b l e on s d o o n t h e fal l in g e d g e s o f sclk wh e n sy n c is lo w . on the sixt een th sclk e d g e , s d o is up d a t e d to re p e a t sdi n w i t h a d e l a y of 1 6 c l o c k c y c l e s . w h en t h e s e r i al tra n sf er t o al l devices is com p let e , sy n c shou l d be tak e n hi gh . th i s p r ev en t s a n y fur t h e r d a ta f r o m b e i n g clo c k e d i n to t h e de vices. t o r e ad b a ck t h e co n t e n ts o f t h e d a c r e g i st er wi t h o u t wr i t in g to t h e p a r t , sy n c sh ou ld be t a k e n lo w while ld a c is h e l d hig h . a co n t in uo us sclk s o ur ce ma y be us ed , if i t c a n be a r ra n g e d th a t sy n c is h e l d lo w f o r th e co r r ec t n u m b er o f c l o c k c y c l es. a l t e r n a t i v ely , a b u rst clo c k con t a i nin g t h e exac t n u m b er o f cl o c k c y cl es ma y b e u s e d and sy n c tak e n h i g h so m e ti m e la t e r . the o u t p u t s o f al l t h e d a cs i n t h e sys t em can b e up da t e d s i m u l t ane o u sly u s ing t h e ld a c sig n al . d a isy - cha i nin g r e ad b a ck is a l s o p o ssi b le t h r o ug h t h e s d o p i n o f t h e las t de vic e in t h e d a c cha i n, b e c a us e t h e d a c da t a p a s s es t h r o ug h t h e d a c cha i n wi t h t h e a p p r o p r i a t e la t e n c y .
ad5570 rev. 0 | page 19 of 24 appli c ations inf ormati o n typical operating circuit f i gur e 38 s h o w s th e typ i cal op er a t in g c i r c ui t f o r th e ad5570. t h e o n l y e x t e rn al co m p o n en t n eed e d f o r th i s p r eci s i o n 16- b i t d a c is a si n g le ext e r n al p o si t i ve r e fer e n c e . b e c a us e t h e de vice in co r p ora t es r e fer e n c e b u f f ers, i t e l im ina t es t h e n e e d fo r a n e g a t i ve r e fer e nce , ext e r n a l in v e r t ers, p r e c isio n a m plif iers, an d r e sis t o r s. this le ads t o a n o v eral l s a v i n g in bo th cos t a nd bo a r d sp ac e. in t h e c i r c u i t b e l o w , v dd and v ss are b o t h c o n n e c te d to 1 5 v , but v dd a nd v ss ca n op era t e s u p p l ies f r o m +11.4 v t o +16.5 v . i n f i g u re 3 8 , a g nd s i s c o n n e c te d to a g nd , b u t t h e opt i on of f o r c e/s e n s e is i n cl ude d on t h is de vice , if r e q u ire d b y t h e us er . 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ad5570 v ss v dd clr ldac sync sclk sdin sdo refgnd refin refgnd v out agnds agnd pd dgnd +15v 0.1 f1 0 f 0.1 f1 0 f ? 15v v out 5v adr435 03760- 0- 044 ldac sync sclk sdin sdo 5k ? f i g u re 38. t y pic a l o p er at ing ci r c uit force/sens e o f agnd b e ca us e o f th e extr e m e l y h i g h accura c y o f th i s d e v i ce , sys t e m desig n issues su ch as g r o u ndin g a nd co n t ac t r e sist an ce a r e ver y im p o r t an t. the ad5570, wi th 10 v o u t p u t , has a n ls b size o f 305 v . th er ef o r e , s e r i es wir i ng a nd co nn ec t o r r e sis t a n ces o f ve r y s m a l l v a l u es c o u l d c a u s e vol t age drop s of an l s b . f o r t h i s r e as o n , the ad5 570 o f f e rs a f o r c e/s e n s e o u t p u t co nf igura t io n. f i gur e 39 s h o w s h o w t o co nn ec t th e ad5570 t o th e f o r c e/s e n s e am pl i f i e r . w h e r e a c c u r a c y of t h e out p ut i s i m p o r t an t , an am pl i - f i er s u c h as the o p 177 is ideal . the o p 177 is u l tra p r e cis e wi t h o f fs et v o l t a g es o f 10 v maxim u m a t r o om t e m p er a t ur e , and o f fs et dr if t o f 0.1 v/c m a x i m u m. a l ter n a t i v e r e co mm e nde d a m p l if iers a r e t h e o p 1177 and th e o p 77. f o r a p p l ica t io n s w h er e o p ti m i za ti o n o f th e ci r c ui t f o r se t t li n g t i m e i s n eed e d , th e ad845 is r e commende d . precision volt age reference selection t o ac hiev e t h e op tim u m p e r f o r ma nce f r o m the ad5570, t h ou g h t s h ou l d b e g i ve n to t h e s e l e c t i o n of a pre c i s i o n vo lt age r e f e r e n c e . th e ad5570 has j u st o n e r e f e r e n c e in p u t, refi n. this v o l t a g e o n refin is us e d to p r o v ide a b u f f er e d p o si t i ve a nd n e g a t i v e r e fer e n c e fo r t h e d a c co r e . ther efo r e , a n y er r o r in t h e v o l t a g e r e fer e n c e is r e f l e c t e d in t h e o u t p u t o f t h e de vice . 6 2 3 (other connections omitted for clarity) op177* *for optimum settling time performance, the ad845 is recommended. 03760-0-045 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ad5570 v ss v dd clr ldac sync sclk sdin sdo refgnd refin refgnd v out agnds agnd pd dgnd f i g u re 39. d r iv ing a g nd a n d a g nds u s ing a f o r c e / s e ns e a m p lif i e r ther e a r e fo ur p o s s i b le s o ur ces o f er r o r t o co n s ider w h en ch o o sin g a vol t age r e fer e n c e fo r hig h acc u rac y a p plica t io n s : ini t ial acc u rac y , t e m p era t ur e co ef f i cien t o f t h e o u t p ut v o l t a g e , lo n g ter m dr if t, a nd o u t p u t vol t a g e n o is e. i n i t ial acc u rac y o n t h e o u t p u t vol t a g e o f a n exter n al r e fer e n c e co u l d le ad t o a f u l l -s cale er r o r in t h e d a c. the r efo r e , t o minimi ze t h es e er r o rs, a r e fer e n c e w i t h lo w ini t i a l acc u rac y sp e c if ic a t ion is p r efer r e d . a l s o , ch o o sin g a r e fer e n c e w i t h a n o u t p u t tr im ad j u s t m e n t , s u c h as th e ad r425, a l lo ws a sys t em desig n er t o t r im sys t em er r o rs o u t b y s e t t i n g t h e r e fer e n c e v o l t a g e t o a v o l t a g e o t h e r t h a n t h e n o minal . the t r im ad j u s t - m e n t c a n als o b e us ed a t t e m p era t ur e t o tr im ou t an y er r o r . lo n g t e r m dr if t (l t d ) is a m e asur e o f h o w m u c h the r e f e r e n c e d r i f t s o v e r ti m e . a r e f e r e n c e wi th a ti g h t lo n g - t e r m d r i f t sp e c if ic a t io n ensur e s t h a t t h e o v era l l s o l u t i o n rema in s r e la t i v e l y s t a b le o v er i t s e n tir e lif e tim e . the t e m p er a t ure co ef f i cien t o f a r e fer e n c e s o u t p u t v o l t a g e a f fe c t s inl, d n l, a nd tue. a refer e n c e wi t h a t i g h t t e m p era - t u r e co ef f i cien t sp e c if ic a t ion sho u ld b e ch os e n t o r e d u ce t h e dep e n d e n c e o f t h e d a c o u t p u t v o l t a g e on am b i en t con d i t ion s . i n hig h acc u rac y a p plic a t io n s , w h ich h a v e a r e l a t i ve ly lo w n o is e b u dg et, r e fer e nc e o u t p ut v o l t a g e n o is e ne e d s t o b e con s ider e d . c h o o s i ng a re fe re nc e w i t h a s l o w an output noi s e vo lt age a s p r a c ti cal f o r th e sys t e m r e so l u tio n r e q u i r ed i s im po r t a n t . p r eci - sio n v o l t a g e r e f e r e n c es s u ch as t h e ad r435 (xf e t desig n ) p r o d uce lo w o u t p u t n o is e in the 0.1 h z t o 10 h z r e g i o n . h o w e v e r , as t h e cir c ui t b a n d wi d t h i n cr e a s e s, f i l t er in g t h e o u t p ut of t h e re f e re nc e m a y b e re qu i r e d to m i n i m i z e t h e output noi s e.
ad5570 rev. 0 | page 20 of 24 table 8. partial list of prec i s i o n re fere nces r e comme nd ed for use with the ad5570 par t no. initial accuracy (mv max) long-term dri f t (ppm typ) temp drift (ppm / c m a x) 0.1 hz to 10 hz noise (v p-p ty p) adr43 5 6 3 0 3 3 . 4 adr42 5 6 5 0 3 3 . 4 adr02 1 5 5 0 3 1 5 adr39 5 6 5 0 2 5 5 ad5 86 2.5 1 5 1 0 4 1 a v ail abl e in sc 70 package. layout gu idelines i n an y cir c ui t w h er e acc u rac y is im p o r t an t, ca r e f u l co n s idera - t i on of t h e p o we r supply an d g r ou nd re tu r n l a y o ut h e lp s to en s u r e t h e ra te d p e r f o r ma n c e . th e p r i n t e d cir c ui t b o a r d o n whic h t h e ad5 570 is m o un t e d s h o u ld b e desig n e d s o tha t the a n a l o g a nd dig i t a l s e c t io n s a r e s e p a r a te d an d conf in e d to cer t a i n a r eas o f th e bo a r d . i f the ad5570 is in a sys t em w h er e m u l t i p le de vice s r e q u ir e a n a g nd- t o - d g nd co nne c t io n, t h e co nne c t io n shou ld b e m a de a t o n e p o in t o n ly . the st a r g r o u n d p o in t sh o u ld b e est a b l ish e d as cl os e as p o ssib le to t h e d e vice . the ad5570 sho u ld ha v e am p l e s u p p l y b y p a s s in g o f 10 f in p a ral l e l wi t h 0.1 f o n eac h s u p p l y lo ca t e d as c l os e t o th e p a ck- a g e as p o ssi b le, i d e a l l y r i g h t u p aga i n s t t h e de vic e . the 10 f ca p a c i t o rs a r e t h e t a n t al um bead typ e . th e 0.1 f ca p a ci t o r s h o u l d ha v e l o w e f f e cti v e se ri e s r e s i s t a n ce ( e s r ) a n d e f f e cti v e s e r i es ind u c t an c e (es i ) s u c h as t h e comm o n cer a mic typ e s, w h ich p r o v ide a lo w im p e dan c e p a t h t o g r o u nd a t hig h f r e q ue n - cies t o ha ndle t r a n sien t c u r r en ts d u e t o i n t e r n al log i c swi t ching. the p o w e r s u p p l y lin e s o f th e ad5570 sh o u ld us e as la rg e a t r ace as p o s s ib le t o p r o v ide lo w im p e dance p a t h s a nd r e d u c e t h e ef fe c t s o f g l i t c h es o n the p o w e r s u p p l y line . f a st swi t chin g sig n als s u c h as clo c ks sh o u ld be s h ie lde d wi t h dig i tal g r o u nd t o a v oi d r a d i a t i n g noi s e to ot he r p a r t s of t h e b o ar d, an d s h ou l d ne ver b e r u n n e a r t h e r e fer e n c e in p u ts. a g r o u nd li n e r o u t e d betw een t h e s d in an d s c lk lin e s h e l p s r e d u c e cr os s t al k bet w een t h e m (n o t r e q u i r ed o n a m u l t i l a y e r bo a r d , wh i c h h a s a s e p a r a te g r ou nd pl a n e, b u t s e p a r a t i ng t h e l i ne s he lp s ) . i t i s ess e n t ia l to min i mi ze n o is e o n t h e ref i n li n e , b e ca us e i t co u p le s th r o ugh t o th e d a c o u t p u t . a v oi d c r o s s o ve r of d i g i t a l a n d a n a l o g s i g n a l s . t r a c e s on opp o s i t e sides o f t h e b o a r d sh o u l d r u n a t r i g h t a n g l es to e a ch o t h e r . this r e d u ce s th e e f f e ct s o f f eed th r o ugh th e boa r d . a m i cr os tri p t e chni q u e is b y fa r t h e b e st, b u t n o t alwa ys p o s s ib le w i t h a do ub le-si d e d b o a r d . i n t h is te ch niq u e, t h e co m p o n e n t side o f t h e b o a r d is de d i ca te d to g r o u nd plan e, w h i l e si g n a l t r aces a r e place d o n t h e s o lder side . opt o -cou pler interface i n man y p r o c ess co n t r o l a p pli c a t io n s , i t is n e ce ss a r y t o p r o v ide a n is ol a t ion b a r r ier b e tw e e n t h e co n t r o l l er a n d t h e un i t b e i n g co n t r o l l e d . o p to-is o la t o rs ca n p r o v ide v o l t a g e is ola t ion i n exces s o f 3 kv . the s e r i al lo adin g s t r u c t ur e o f th e ad5570 ma k e s i t i d e a l for opto - i s o l a te d i n te r f a c e s , b e c a u s e t h e n u mb e r o f in t e r f ace lin e s is k e p t t o a minim u m. f i gur e 40 s h o w s a 4-c h a n n e l is ola t ed in t e r f ace t o t h e ad5570. t o r e d u ce t h e n u m b e r of opto - i s o l a tor s , i f t h e s i m u lt a n e o u s up d a t i ng of t h e d a c i s n o t r e q u i r ed , th e l d a c p i n ma y be tied pe rm a n en tl y lo w . th e d a c c a n t h en b e u p da te d on t h e r i sin g e d ge o f s y n c . v cc to sdin to sclk to sync sync out serial clock out serial data out controller opto-coupler to ldac control out 03760-0-050 f i g u re 40 . o p to - i s o l a ted inte r f ace microprocessor interfacing m i cr o p r o ces s o r in t e r f acing t o th e ad5570 is via a s e r i a l b u s th a t use s s t a n da r d p r o t oco l co m p a t i b le wi th m i cr oco n tr o l le r s a nd dsp p r o c ess o rs. th e comm unica t io n s chan n e l is a 3- wir e (mini m um) i n ter f ace co n s ist i ng o f a clo c k sig n a l , a d a t a sig n a l , a nd a s y n c hr o n iza t ion sig n al . th e ad5570 r e q u ir es a 16-b i t da ta w o r d w i t h da ta vali d o n th e falli n g ed ge o f sc l k . f o r al l t h e in t e r f aces, t h e d a c o u t p ut u p da t e ma y b e don e a u to m a t i ca l l y w h e n a l l t h e da t a is clo c k e d i n , o r i t m a y b e don e un der t h e con t rol o f ld a c . the co n t e n ts o f t h e d a c r e g i s t er m a y b e re a d u s i n g t h e re a d b a ck f u nc t i o n .
ad5570 rev. 0 | page 21 of 24 ad5570 to mc68hc11 interface f i gur e 41 s h o w s a n exa m ple o f a s e r i al i n t e r f ac e b e tw e e n t h e ad5570 an d t h e m c 68h c11 micr o c o n tr ol ler . the s e r i al p e r i ph eral in t e r f ace (s p i ) o n t h e mc68h c11 is co nf igur e d fo r mast er m o de (ms t r = 1), clo c k p o la r i ty b i t (c po l = 0), a n d t h e clo c k phas e b i t (cp h a = 1). the s p i is conf igur e d b y wr i t i n g t o t h e sp i co n t r o l r e g i s t er (s pcr)s e e t h e 68 h c 11 u s e r man u a l . s c k o f t h e 68 h c 11 dr i v es t h e s c lk o f t h e ad5570, the m o s i o u t p u t dr i v es th e s e r i al da t a lin e (d in) o f th e ad5570, and the miso in p u t is dr i v en f r om s d o . the sy n c i s d r ive n f r om one of t h e p o r t l i ne s , i n t h i s c a s e p c 7 . w h en da ta is bein g tra n smi t t e d t o th e ad5570, th e s y nc lin e (pc7) is t a k e n l o w a nd d a t a is t r a n smi t te d msb f i rst. d a t a a p p e ar i n g on t h e m o si output i s v a l i d on t h e f a l l i n g e d ge of s c k . e i gh t f a ll in g c l oc k ed g e s oc cu r i n th e tr a n s m i t c y c l e , so , i n o r der t o lo ad t h e r e q u ir e d 16- b i t w o r d , pc7 is no t b r o u g h t hig h un til t h e seco n d 8- b i t w o r d ha s been tra n sf e r r e d t o th e d a c s in p u t shif t r e g i st er . ad5570* sclk din sync mosi sclk pc7 mc68hc11* * a dditional pins omitted for clarity sdo miso 03760-0-014 f i gur e 4 1 . ad55 70 t o mc6 8 h c 11 int e r f a c e ld a c is co n t r o l l ed b y th e pc6 p o r t o u t p u t . th e d a c ca n be up d a t e d a f t e r e a c h 2 - by t e t r a n s f e r by br i n g i n g ld a c low . this exa m ple do es no t s h o w o t h e r s e r i al li n e s fo r t h e d a c. i f clr w e r e us ed , i t cou l d be con t r o l l ed b y p o r t o u t p u t pc5, f o r exa m ple . ad5570 to 8051 interface the ad5570 r e q u ir es a c l o c k s y n c hr o n ized t o th e s e r i al da t a . f o r this r e as o n , th e 8051 m u s t b e o p era t ed in m o de 0. i n this m o d e , s e r i a l d a t a en t e rs an d exi t s t h r o ug h rxd , a nd a shif t clo c k i s output on r x d . p3.3 a nd p3.4 ar e b i t p r o g r a mma b l e p i n s o n t h e s e r i a l p o r t and a r e us e d t o dr i v e sy n c a nd ld a c , re sp e c t i vely . the 8051 p r o v ides th e ls b o f i t s s b uf r e g i st er as the f i rs t b i t in t h e da t a s t r e a m . the us er m u s t en s u r e t h a t t h e da t a in t h e sb u f r e g i s t er is a r ra n g e d co r r e c t l y , b e ca us e t h e d a c exp e c t s ms b fi r s t . ad5570* sclk din sync txd p3.3 8xc51* * a dditional pins omitted for clarity sdo rxd v logic ldac p3.4 03760-0-015 f i g u re 42. a d 5 5 7 0 to 80 51 int e r f ace w h e n da ta i s t o be tra n sm i t t e d t o th e d a c , p3.3 i s tak e n lo w . d a t a on r x d i s cl o c ke d out of t h e m i c r o c on t r o l l e r on t h e r i s i ng ed g e o f t x d a n d i s v a l i d o n t h e fall i n g ed g e . a s a r e s u l t , n o gl ue log i c is r e q u ir e d b e tw e e n t h is d a c a nd t h e mic r o c o n t r ol ler in t e r f ace . the 8051 tra n s m i t s da t a in 8 - b i t b y t e s wi t h o n ly eig h t fal l in g clo c k e d g e s o c c u r r i n g in t h e t r an smi t c y cle . b e c a us e t h e d a c exp e c t s a 16-b i t w o r d , s y nc (p 3.3) m u s t b e lef t lo w a f t e r th e f i rs t eig h t b i ts ar e t r a n sfer r e d . af t e r t h e s e cond b y t e has b e en tra n sf e r r e d , th e p3. 3 li n e i s ta k e n h i g h . th e d a c m a y be up d a t e d u s i n g ld a c via p3.4 o f t h e 8 051. ad5570 to adsp2101/adsp 2103 an in t e r f ace betw een t h e ad55 70 a nd t h e ads p 2101/ ads p 2103 is sho w n in f i gur e 4 3 . th e ads p 21 01/ads p 2103 s h o u ld b e s e t up t o o p era t e in t h e spo r t t r an smi t al t e r n a t e f r a m in g m o de . the ads p 2101 /ads p2103 a r e p r og ra mm e d t h rou g h t h e sp or t c o n t ro l re g i ste r a n d s h ou l d b e c o n f i g u r e d as fol l o w s: in t e r n a l clo c k o p er a t io n, ac t i ve lo w f r a m ing, a nd 16-b i t w o r d length. t r a n smission is ini t i a t e d b y wr i t in g a w o rd t o t h e tx r e g i st er a f t e r t h e s p o r t has b e e n enable d . a s t h e da t a is clo c k e d o u t of th e ds p o n t h e r i sin g edg e o f sclk, n o g l ue log i c is r e q u ir ed to in t e r f ace t h e dsp t o t h e d a c. i n t h e in t e r f ace sh o w n, t h e d a c o u t p ut is u p d a te d usin g t h e ld a c pi n v i a t h e d s p . a l te r n a - ti v e l y , th e ld a c i n p u t co uld be tied p e rm a n en tl y lo w , a n d t h e n th e u p d a t e ta k e s p l a c e a u t o ma ticall y wh e n tf s is t a k e n hig h . ad5570* sclk din sync dt sclk rfs adsp2101/ adsp2103* *a ddi t i o n al p i n s o m i t t e d f o r c l ar i t y sdo dr tfs ldac fo 03760-0-016 f i gur e 4 3 . ad55 70 t o adsp 210 1/ adsp 21 03 int e r f a c e
ad5570 rev. 0 | page 22 of 24 ad5570 to pic16c6x/7x evaluation board the p i c16c6x/7x syn c hr on o u s s e r i al p o r t (ss p ) is co nf igur ed as a n s p i mas t er wi t h the c l o c k p o la r i ty b i t s e t to 0. this is do ne b y wr i t in g t o the sy n c hr on o u s s e r i al p o r t co n t rol r e g i s t er (ss p co n). s e e th e p i c 16/ 17 m i cr oco n tr o l l e r u s er m a n u a l . i n this exa m p l e , i/o p o r t ra1 is b e in g us ed t o p u ls e sy n c an d ena b le t h e s e r i al p o r t o f th e ad5570. this micr o c o n tr ol ler tra n sf e r s o n l y e i gh t b i t s o f d a ta d u ri n g ea c h se rial tra n sf e r o p era t ion; t h er e f o r e , tw o co n s e c u t i v e wr i t e op era t io n s a r e n e e d e d . f i gur e 44 s h o w s t h e conn ec t i o n dia g ram. the ad5570 com e s wi th a f u l l eval ua tion bo a r d t o a i d desig n ers in e v al u a t i n g t h e hig h p e r f o r ma n c e o f t h e p a r t wi t h a mini m u m o f ef fo r t . a l l t h a t is r e q u ir e d w i t h t h e e v a l u a t ion b o a r d is a p o w e r s u p p l y , a p c , a n d a n o s c i l l o s c o p e . the ad5570 e v al ua t i o n k i t in c l udes a p o p u l a te d , t e s t e d ad557 0 pr i n te d c i rc u i t b o ard. t h e e v a l u a t i on b o ard i n te r f a c e s to t h e p a ral l e l in t e r f ac e o f t h e pc. s o f t wa r e is a v ai lab l e wi t h t h e ev al ua ti o n boa r d , wh i c h allo w s th e use r t o ea sily p r ogra m th e ad5570. a s c h e ma tic o f the eva l u a t ion bo a r d is s h o w n in f i gur e 45. th e s o f t wa r e r u n s o n a n y pc tha t has m i cr os o f t w i n d o w s? 95/9 8 /me/2000 ins t al led . ad5570* sclk din sync sdo/rc5 sclk/rc3 ra1 pic16c6x/7x* * addi t i o nal p i n s o m i t t e d f o r c l ar i t y sdo sdi/rc4 03760-0-017 a n ap p l i c a t i o n n o t e i s av a i l a b l e t h at g i v e s f u l l d e t a i l s o n o p era t i n g t h e e v al ua t i o n b o a r d . f i g u re 44. a d 5 5 7 0 to pic1 6c6x /7x i n t e r f ace
ad5570 rev. 0 | page 23 of 24 j11 ?19 j11?12 j11?4 j11?6 j11?7 j11?8 j11?13 j11 ? ce ntroni cs conne ctor j11?3 j11?2 j11?5 j4 j5 j6 j7 j8 j9 j10 j11?10 j11?9 j13 ?1 + + + + ++ + + c30 10 f 20v c12 10 f c11 10 f + c13 10 f + c21 10 f + c22 10 f c23 0. 1 f c24 0. 1 f c15 0. 1 f c10 10 f c9 10 f c8 0. 1 f c7 0. 1 f c6 0. 1 f c14 0. 1 f 0. 33 f c2 c4 0. 01 f c36 0. 1 f c3 0. 1 f c35 0. 1 f c16 0. 1 f c34 10 f c5 10 f r2 10k r3 10k c17 0. 1 f c18 10 f u5 u3 u1 u2 j1 tp5 vou t c1 r1 re f/ 2 re f/ 2 op v+ v ? whi t e p l as ti c s s op clam p o p 177 adr435 ad5570 c31 0. 1 f c32 0. 1 f c33 0. 1 f dgnd dgnd dv dd dv dd j13 ?2 j12 ?1 j12 ?2 j11 ?20 j11 ?21 j11 ?22 j11 ?23 j11 ?24 j11 ?25 j11 ?26 j11 ?27 j11 ?28 j11 ?29 j11 ?30 av dd av dd av dd vss av dd dv dd av dd lk2 lk1 tp4 tp10 tp7 tp1 tp2 tp9 tp3 tp8 j2 lk3 vss agnd dgnd av dd av dd y0 vin scl k pd sdo din scl k sync ldac clr vdd vdd refin vss refin lk5 gn d d gn d ag nds ag nd refg nd refg nd sdata busy g nd4 u6 g nd3 vout vin vout vout + v in trim gn d g nd2 g nd1 9 8 7 6 5 1 2 3 3 2 2 91 2 12 1 5 62 5 11 16 14 13 3 7 6 4 1 8 4 5 6 7 10 8 7 6 5 4 3 4 7 5 3 11 19 13 15 17 y1 y2 y3 a0 a1 a2 a3 agnd vss 74act244 lm78l05acm ad7895-10 u4?b agnd j12 ?3 vss oe y0 18 16 14 12 2 1 4 6 8 y1 y2 y3 a0 a1 a2 a3 74act244 u4? a oe 2 1 4 6 8 18 16 14 12 y0 y1 y2 y3 a0 a1 a2 a3 74act244 u9?a oe 11 19 13 15 17 9 7 5 3 y0 y1 y2 y3 a0 a1 a2 a3 74act244 u9?b sd o d in sc lk sclk_adc sdata_adc data scl k din do ut oe re f/ 2 re f re f co nvst clr pd co nvst ldac sync r4 4k7 dv dd r5 4k7 r7 4k7 r6 4k7 dv dd dv dd lk4 pd ldac syn c clr 03760-0-043 f i g u re 45. ev aluat i on b o a r d s c h e m a t i c
ad5570 rev. 0 | page 24 of 24 outline dimensions 16 9 8 1 6.50 6.20 5.90 8.20 7.80 7.40 seating plane 0.05 min 0.65 bsc 2.00 max 0.25 0.09 0.95 0.75 0.55 0.38 0.22 5.60 5.30 5.00 co p l an ari t y 0. 10 8 4 0 1.85 1.75 1.65 compliant to jedec standards mo-150ac f i gure 46. 1 6 -l ead shrink sm al l o u t lin e p a ckage [s sop ] (r s-16) di me nsio ns sho w n i n mi ll im e t e r s ordering guide model temperature r a nge package descri ption package option ad5570ars ?40 c to +85 c 16-lead ssop rs-16 ad5570ars-ree l ?40 c to + 85 c 16-lead ssop rs-16 ad5570ars-ree l7 ?40 c to +85 c 16-lead ssop rs-16 ad5570brs ?40 c to +85 c 16-lead ssop rs-16 ad5570brs-ree l ?40 c to +85 c 16-lead ssop rs-16 ad5570brs-ree l7 ?40 c to +85 c 16-lead ssop rs-16 ad5570wrs ?40 c to +125 c 16-lead ssop rs-16 ad5570wrs-re el ?40 c to +125 c 16-lead ssop rs-16 ad5570wrs-re el7 ?40 c to +125 c 16-lead ssop rs-16 ad5570yrs ?40 c to +125 c 16-lead ssop rs-16 ad5570yrs-ree l ?40 c to +125 c 16-lead ssop rs-16 ad5570yrs-ree l7 ?40 c to +125 c 16-lead ssop rs-16 e v a l - a d 5 5 7 0 e b e v a l u a t i o n boar d ? 2003 analo g de vices, inc. all rights reserve d . tra d em arks and registered tra d ema r ks are the prop erty of their respective owners . c03760C0 C 11/03(0)

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